CD4026 or HCF4026 consists of a 5-stages Johnson decade counter and an output decoder which converts the Johnson code to a 7 segment decoded output for driving one stage in a numerical display. This device is particularly advantageous in display applications where low power dissipation and/or low package count are important. This device has CLOCK, RESET, CLOCK INHIBIT, DISPLAY ENABLE input and CARRY OUT, DISPLAY ENABLE, UNGATED "C" SEGMENT and 7 DECODED outputs (a to g). A high RESET signal clears the decade counter to its zero count. The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low. Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high. Antilock gating is provided on the JOHNSON counter, thus assuring proper counting sequence. The CARRY-OUT (COUT) signal completes one cycle every ten CLOCK INPUT cycles and is used to clock the succeeding decade directly in a multi-decade counting chain.